- 您现在的位置：买卖IC网 > Sheet目录323 > DSP56311EVM (Freescale Semiconductor)KIT EVALUATION FOR DSP56311
Signals/Connections
2.2 Ground
Table 2-3. Grounds
Ground Name
GND P
GND P1
GND
Description
PLL Ground — A ground dedicated for PLL use. The connection should be provided with an extremely low-impedance
path to ground. V CCP should be bypassed to GND P by a 0.47 μ F capacitor located as close as possible to the chip
package.
PLL Ground 1 —A ground dedicated for PLL use. The connection should be provided with an extremely low-impedance
path to ground.
Ground —Connected to an internal device ground plane. The user must provide adequate external decoupling
capacitors for all GND connections
2.3 Clock
Table 2-4. Clock Signals
Signal
Name
EXTAL
Type
Input
State During
Reset
Input
Signal Description
External Clock/Crystal Input —Interfaces the internal crystal oscillator input to an
external crystal or an external clock.
XTAL
Output
Chip-driven
Crystal Output —Connects the internal crystal oscillator output to an external
crystal. If an external clock is used, leave XTAL unconnected.
2.4 PLL
Table 2-5. Phase-Lock Loop Signals
Signal Name
PCAP
Type
Input
State During
Reset
Input
Signal Description
PLL Capacitor —Connects an off-chip capacitor to the PLL filter.
Connect one capacitor terminal to PCAP and the other terminal to V CCP .
If the PLL is not used, PCAP is tied to V CC , GND, or left floating.
CLKOUT
Output
Chip-driven
Clock Output— Provides an output clock synchronized to the internal
core clock phase.
If the PLL is enabled and both the multiplication and division factors
equal one, then CLKOUT is also synchronized to EXTAL.
If the PLL is disabled, the CLKOUT frequency is half the frequency of
EXTAL.
Note: At operating frequencies above 100 MHz, this signal produces a
low-amplitude waveform that is not usable externally by other devices.
Above 100 MHz, you use the asynchronous bus arbitration option that is
enabled by the Asynchronous Bus Arbitration Enable (ABE) bit in the
Operating Mode Register (OMR). When set, the DSP enters the
Asynchronous Arbitration mode, which eliminates the BB and BG setup
and hold time requirements with respect to CLKOUT.
DSP56311 User’s Manual, Rev. 2
2-4
Freescale Semiconductor
发布紧急采购，3分钟左右您将得到回复。
相关PDF资料
DSPAUDIOEVMMB1E
BOARD MOTHER DSP563XX
DSPIC30F2010 DEVELOPMENT KIT
KIT DEV EMBEDDED C
DSTRM-KT-0181A
DSTREAM DEBUG AND TRACE UNIT
DSUT1CSU
SURGE SUPPR NETWORK W/GROUND
DTEL2
SURGE SUPPRESSOR PHONE RJ11/RJ45
DV003001
PROGRAMMER PICSTART PLUS 16C/17C
DV164035
MPLAB ICD3 IN-CIRC DEBUGGER
DV164039
KIT DEV PIC24FJ256DA210
相关代理商/技术参数
DSP56311EVMIG_D
制造商:未知厂家 制造商全称:未知厂家 功能描述:DSP56311EVMIG DSP56311EVM Sample Code
DSP56311EVMUM
制造商:未知厂家 制造商全称:未知厂家 功能描述:DSP56311 Evaluation Module Hardware Reference Manual
DSP56311FACT
制造商:未知厂家 制造商全称:未知厂家 功能描述:DSP56311 Higher performance programmable DSP for demanding voice and data applications
DSP56311UM
制造商:未知厂家 制造商全称:未知厂家 功能描述:DSP56311 24-Bit Digital Signal Processor Users Manual
DSP56311UMAD
制造商:未知厂家 制造商全称:未知厂家 功能描述:DSP56311 Users Manual Addendum
DSP56311VF150
功能描述:数字信号处理器和控制器 - DSP, DSC 150Mhz/300MMACS 150Mhz EFCOP RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
DSP56311VF150B1
功能描述:数字信号处理器和控制器 - DSP, DSC 24 BIT DSP
RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
DSP56311VF150R2
功能描述:数字信号处理器和控制器 - DSP, DSC 24 BIT DSP RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT
